CPU Visual Handbook · lab

Adding, gate by gate

Twenty gates, and not one of them knows how to add. Move the two sliders and watch the carry climb from the low bit to the high one — the sum appears because the composition is right, not because anything here was told the answer.

A lit gate is a gate whose output is 1. Every line in this circuit carries its own bit, high or low, so a gate sitting dark is a gate that ran and said zero — not a gate that sat still. Set both inputs to zero and watch: the whole circuit goes dark, and the depth counter keeps reporting the same propagation delay. A ripple-carry adder is slow because of its shape, not because of the number you feed it.

And the gates open too. Double-click one and you are inside CMOS: a pull-up network of PMOS pulling toward 1, a pull-down network of NMOS pulling toward 0, and the node where they meet. Nothing down there is a lookup table — the answer comes out of transistors switching. An XOR costs sixteen of them, which is most of why an adder is expensive.